6DD1640-0AB0

6DD1640-0AB0

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6DD1640-0AB0

O 引 言
随着现

扫描控制基本流程如下：
1)程序首先计算各控制量的分段数目及段内各控制量的起始值、步进值、步进个数。
2)通过系统总线，程序将上述计算好的数据依次送入扫描控制器内的RAM中保存。
3)程序控制触发单元产生全局中断信号，由中断处理单元通知运算单元读取各控制量首段的初始值。
4)程序控制触发单元产生使能信号，控制步进脉冲发生单元产生计数脉冲。这时运算单元开始进行累加／减计算并且计数器记录已产生的脉冲个数。累加／减运算器的输出值通过D／A变换器转换为电压值控制相关硬件电路。
5)当运算单元内计数器的计数值达到本段设定的步进个数时，运算单元产生中断信号通过中断处理单元进行中断识别并通知运算单元内已产生中断的模块自动从RAM内读取下一段的初始值。运算单元内四个模块产生中断的中断级别各不相同，如果多个中断同时产生，那么中断处理单元会对各中断进行缓存、排序并且首先处理中断级别高的中断。
6)当下一个计数脉冲到来时，运算单元内产生中断的模块又会重新开始累加／减运算并计数，重复4、5步。
7)触发单元记录扫描时间。当扫描时间达到预设值时，触发单元控制使能信号为低电平，各寄存器复位，扫描过程结束。

3 模块内部实现
1)地址译码／数据缓存单元地址译码／数据缓存单元连接外部总线，通过译码接收属于本扫描控制器的数据和控制字，包括：复位控制字、扫描使能控制字、触发单元内计数器的计数值(用于计算扫描时间)、步进脉冲发生单元内计数器的计数值(用于产生步进脉冲)以及RAM内需存储的控制量DAC值。
2)RAM存储单元
存储控制量DAC值。如果接收机内地址资源足够丰富，软件可以通过地址译码／数据缓存单元直接访问RAM。如果接收机内地址资源有限，可以将整个RAM划分为若干个区域(段地址)，每个区域对应于一种控制量。每种控制量的各分段数据依次排列，可通过段内偏移地址访问。
3)运算单元
运算单元包括RAM数据回读模块、计数器及累加／减运算器模块。RAM数据回读模块的回读方式取决与RAM内数据的存储格式；计数器通过将读取的步进个数值与当前的计数值进行比较决定是否产生中断。在实际应用中，累加／减运算器位数有限，而计算的步进DAC值位数有可能大大超过运算器位数，这就要求设计人员必须认真选取步进DAC的有效长度，对DAC值进行适当截取，使控制误差能够在可接受的范围内。累加／减运算器模块在步进脉冲的触发下，对初始值进行累加／减运算，其DAC值输出位数等于选甩的DAC器件位数。

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